The present invention relates to conductivity modulated MOSFETs, and contemplates improvements in latch-up prevention and reduction of on resistance.
One conventional example which is disclosed in a U.S. Pat. No. 4,364,073 is shown in FIG. 9. As shown in FIG. 9, a conductivity modulated MOSFET device of this example includes a p.sup.+ anode region 21 for supplying holes to be injected, and an n base region 22 serving virtually as a drain. Between the anode region 21 and the n base region 22, there is formed an n.sup.+ buffer layer 23 for controlling the efficiency of hole injection.
In a topside of the n base region 22, at least one pair of a p channel region 26 and an n.sup.+ source region 27 are formed by DSA (Diffusion Self Alignment) technique. An insulated gate is formed on the surface of the channel region 26 between the n.sup.+ source region 27 and the n base region 22. The insulated gate includes a gate insulating oxide film 28 formed on the semiconductor surface and a gate electrode 29 formed on the oxide film 28.
A source electrode 33 is connected with the source region 27 and the channel region 26, and an anode electrode 34 is formed on a bottom of the anode region 21.
Application of a required positive voltage to the anode electrode 34, and a gate voltage above a threshold voltage to the gate electrode 29 changes a channel portion 26a which is a surface layer of the channel region 26 just below the gate electrode 29, into a conducting state, in which, electrons flow from the n.sup.+ source region 27 through the channel portion 26a into the n base region 22. On the other hand, a great number of holes (minority carriers) are injected from the p.sup.+ anode region 21 into the n base region 22. The buffer layer 23 controls the efficiency of this hole injection.
In the n base region 22, some of the injected holes disappear by recombining with electrons conveyed through the channel portion 26a, but other holes flow into the channel region 26 and reach the source electrode 33. Nevertheless, a large quantity of carriers is accumulated in the n base region 22, so that the conductivity is modulated or increased, and the on resistance is dramatically reduced.
Thus, the conductivity modulated MOSFET is characterized by its very low on resistance and high withstand voltage.
However, in the conductivity modulatd MOSFET, there are formed a parasitic pnp transistor Q.sub.1 and a parasitic npn transistor Q.sub.2, which are connected to form a pnpn thyristor, as shown in an equivalent circuit of FIG. 10. A resistance Rb is a base resistance of the transistor Q.sub.2, which is formed in the channel region 26.
In this structure, a voltage drop Ib.multidot.Rb is developed across the resistance Rb by the flow of a current Ib due to the holes which are injected from the p.sup.+ anode region 21 equivalent to the emitter of Q.sub.1 and reaches the channel region 26 equivalent to the collector of Q.sub.1. If this voltage drop exceeds a base threshold voltage (0.6 V) of Q.sub.2, then the transistor Q.sub.2 turns on, and increases its collector current, i.e., a base current of the transistor Q.sub.1. Consequently, the current Ib which is a collector current of Q.sub.1 is increased, and a base current of Q.sub.2 is increased. In this way, a positive feedback loop is formed, and the device falls into latch-up, which cannot be cancelled until interruption of the power supply.
In order to prevent such a latch-up, it is important to decrease the resistance Rb formed in the channel region 26, and the current Ib flowing through Rb.
In conventional conductivity modulated MOSFETs, therefore, the efficiency of the hole injection is decreased by forming the n.sup.+ buffer layer 23 adjacent to the p.sup.+ anode region, or the current amplifications of the parasitic transistors Q.sub.1 and Q.sub.2 are degraded by introducing a lifetime killer into the substrate by Au diffusion or irradiation with electrons.
However, it is not possible to sufficiently reduce the on resistance when the hole injection efficiency is decreased, and the lifetime killer is distributed over the entirety of the substrate, so that there is a tendency to affect the fundamental operation of the MOSFET, and it becomes difficult to control the gate threshold voltage at a predetermined value in the fabrication process.